• DocumentCode
    3555886
  • Title

    Low resistance MOS technology using self-aligned refractory-silicidation

  • Author

    Okabayashi, H. ; Nagasawa, E. ; Morimoto, M.

  • Author_Institution
    Nippon Electric Co., Ltd., Kawasaki, Japan
  • Volume
    28
  • fYear
    1982
  • fDate
    1982
  • Firstpage
    556
  • Lastpage
    559
  • Abstract
    A new low resistance MOS technology has been developed. An essential part of the new technology is ion implantation through metal film (ITM) to induce metal/Si interface mixing and also to form doped layers. The ITM technique enablds forming high quality refractory metal silicide overcoats on Si patterns with excellent self-alignability and reproducibility. Using the new technology, MOSFETs with self-aligned Mo-silicided gate and source/drain have been fabricated, even without any insulating spacers on gate side walls.
  • Keywords
    Annealing; Etching; MOSFETs; Optical films; Rough surfaces; Silicidation; Silicides; Surface morphology; Surface roughness; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1982 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1982.190352
  • Filename
    1482886