Source and drain junctions by oxidizing arsenic doped polysilicon

Very shallow source-drain junctions with low leakage and no implant damage have been successfully fabricated. After the pattern transfer at the Gate level, a thin (∼500Å) layer of polysilicon is deposited, doped with As, and oxidized in steam at a rate which is faster than the As diffusion rate. The process provides simultaneously very shallow (500-1000Å) junctions, a gate offset oxide and reduced gate to S/D overlap. IGFETs show equivalent, or improved, properties when compared to implanted S/D´s. The process is simple and directly compatible for VLSI technologies which require silicides for the source, drain and gate.