DocumentCode
3556139
Title
High speed four-bit full adder with resistor coupled Josephson logic
Author
Sone, J. ; Yoshida, T. ; Abe, H.
Author_Institution
NEC Corporation, Kawasaki, Japan
Volume
29
fYear
1983
fDate
1983
Firstpage
682
Lastpage
685
Abstract
A four-bit full adder circuit implemented in Resistor Coupled Josephson Logic (RCJL) has been designed and successfully tested with 173ps critical path delay, The full adder circuit uses dual rail logic with emphasis on high speed operation. Fast switching characteristics and large fan-out capabilities of the sum and carry generators have been verified by using computer-simulations. An experimental four-bit full adder circuit was fabricated using lead-alloy Josephson IC technology with a 5-µm minimum feature size and a 7-µm minimum junction diameter. The circuit consists of 80 devices with 264 junctions. The minimum critical path delay for the ripple carry adder was measured to be 173ps / 4 bits. This result demonstrates the RCJL potential for high speed digital applications.
Keywords
Added delay; Adders; Circuit testing; Coupling circuits; Josephson junctions; Logic circuits; Logic design; Logic testing; Rails; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1983 International
Type
conf
DOI
10.1109/IEDM.1983.190599
Filename
1483724
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