• DocumentCode
    3556247
  • Title

    Insulated gate transistor modeling and optimization

  • Author

    Yilmaz, Hamza ; Van Dell, Ron W. ; Owyang, King ; Chang, Michael F.

  • Author_Institution
    General Electric Company, Syracuse, N. Y.
  • Volume
    30
  • fYear
    1984
  • fDate
    1984
  • Firstpage
    274
  • Lastpage
    277
  • Abstract
    The Insulated Gate Transistor (IGT) is a new power switching device which appears promising for high voltage applications. As of this date, however, this device has not been quantitatively modeled or optimized. The aim of the present study is to develop an accurate and effficient model of the IGT. The IGT is modeled as a Bipolar Junction Transistor (BJT) driven by a MOSFET. The bipolar nature of the device is examined by studying the effects of carrier lifetime on electrical performances. This model also predicts the effects of the gate-oxide thickness, channel length, and cell spacing on the IGT forward I-V characteristics for a 100-1200V range in blocking voltage. The relative significance of the MOS/BJT components of the device has been explored. This is particularly important when optimizing designs over a wide range of voltage ratings Careful attention to this has led to greater than a three times improvement in high temperature dynamic latching current This is the key to obtaining a wide safe-operating-area for the IGT. For the first time, an accurate and straightforward mode of the IGT has been developed. The model predictions are within 10% of the experimental data.
  • Keywords
    Charge carrier lifetime; Insulated gate bipolar transistors; Insulation; MOSFET circuits; P-i-n diodes; Physics; Power electronics; Predictive models; Temperature; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1984 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1984.190700
  • Filename
    1484471