• DocumentCode
    3560664
  • Title

    SEU Analysis of Complex Circuits Implemented in Actel RTAX-S FPGA Devices

  • Author

    Berg, M. ; Kim, H. ; Friendlich, M. ; Perez, C. ; Seidleck, C. ; LaBel, K. ; Ladbury, R.

  • Author_Institution
    Goddard Space Flight Center, MEI Technol., Inc., NASA, Greenbelt, MD, USA
  • Volume
    58
  • Issue
    3
  • fYear
    2011
  • fDate
    6/1/2011 12:00:00 AM
  • Firstpage
    1015
  • Lastpage
    1022
  • Abstract
    A novel approach to SEE characterization of counters implemented in a RTAX-S FPGA is presented. Net fan-out, capacitive loading, and operational frequency have demonstrated a direct impact to counter SEU cross sections as compared to shift registers.
  • Keywords
    field programmable gate arrays; integrated circuit testing; logic circuits; shift registers; Actel RTAX-S FPGA devices; SEE characterization; SEU analysis; SEU cross sections; capacitive loading; complex circuits; net fan-out; shift registers; Clocks; Field programmable gate arrays; Radiation detectors; Shift registers; Single event upset; Testing; Counter test structures; error prediction; field programmable gate arrays; single event effects;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • Conference_Location
    4/21/2011 12:00:00 AM
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2011.2128886
  • Filename
    5753967
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3560664