Resistive Memories for Ultra-Low-Power embedded computing design

This paper addresses two technologies as an example of optimized devices for FPGA and fixed-logic IC design (as non volatile Flip-Flops). In FPGAs, the replacement of the SRAM based configuration memory with ReRAM allows saving area and suppressing the standby power consumption. Although the non-volatility eliminates standby power consumption, the leakage current through the ReRAM during run time depends on the high resistive state (HRS) value. A Conductive Bridge RAM (CBRAM) cell with dual-layer electrolyte stack with a resistance ratio higher than 106 has been proposed to minimize the leakage current in the operating mode. The introduction of ReRAM in fixed-logic IC circuits allows unifying non-volatility, zero standby leakage, and rapid power on/off operations. Endurance, low operating voltage and high speed are the main ReRAM specifications to enable the design of non-volatile Flip-Flop with fast switching. An HfO2/Ti based OxRAM cell with a switching time lower than 10ns at 1V and a high endurance up to 108 cycles has been proposed for this application.