Front-end electronics for the RatCAP mobile animal PET scanner

We report on the development of the front-end electronics for the RatCAP (Rat Conscious Animal PET), a portable and miniature Positron Emission Tomography scanner. The ASIC is realized in a CMOS 0.18 μm technology and it is composed of 32 channels of Charge Sensitive Preamplifier (CSP), 3^rd order semi-gaussian bipolar shaper, timing discriminator with independent channel adjustable threshold and a 32-line address serial encoder to minimize the number of interconnections between the camera and the data acquisition system. Each chip has a maximum power dissipation of 125 mW. A mathematical model of the timing resolution as a function of the noise and slope at the discrimination point as well as the photoelectron statistics was developed and validated. So far, 3 ASIC prototypes implementing part of the electronics were sent to fabrication. Results from the characterization of the first two prototypes are presented and discussed.