Fast center search algorithm with hardware implementation for motion estimation in HEVC encoder

Author

Medhat, Ahmed ; Shalaby, Ahmed ; Sayed, Mohammed S. ; Elsabrouty, Maha ; Mehdipour, Farhad

Author_Institution

Egypt-Japan Univ. of Sci. & Technol., Alexandria, Egypt

fYear

2014

Firstpage

155

Lastpage

158

Abstract

This paper presents a Fast Center Search Algorithm (FCSA) and its hardware implementation design of integer Motion Estimation for High Efficiency Video Coding (HEVC). FCSA achieves average time saving ratio up to 40% for HD video sequences with respect to full search, with insignificant loss in terms of PSNR performance and bit rate. The proposed hardware implementation shows that it meets the requirements of 30 4K frame per second with ±16 search window at 550 MHz. The prototyped architecture utilizes 8% of the LUTs and 4% of the slice registers in Xilinx Virtex-6 XC6VLX-550T FPGA.

Keywords

field programmable gate arrays; motion estimation; search problems; video coding; FCSA; HEVC encoder; PSNR performance; Xilinx Virtex-6 XC6VLX-550T FPGA; fast center search algorithm; hardware implementation; high efficiency video coding; integer motion estimation; motion estimation; prototyped architecture; search window; video sequences; Algorithm design and analysis; Hardware; Motion estimation; PSNR; Prediction algorithms; Registers; Video coding; HEVC; block matching; inter prediction; motion estimation; sum of absolute difference (SAD) architecture;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on

Type

conf

DOI

10.1109/ICECS.2014.7049945

Filename

7049945