Comparative analysis of Sense Amplifiers for SRAM in 65nm CMOS technology

Author

Chandoke, Nidhi ; Chitkara, Neha ; Grover, Anuj

Author_Institution

Indraprastha Inst. of Inf. Technol., Delhi, India

fYear

2015

Firstpage

1

Lastpage

7

Abstract

A comparative analysis of four sense amplifiers for Static Random Access Memories (SRAMs) namely conventional current Sense Amplifier (CSA), Current Latched Sense Amplifier (SA), Clamped Bitline SA and Gated Diode SA is presented in 65 nm CMOS technology. Mismatches are introduced in the form of W/L variations, bitline capacitance variations, temperature variations and Vdd variations and their effect on the sense amplifier´s sense offset and delay offset have been analysed and reported. In the end, the four sense amplifiers are compared based on offset, delay, power and their behavior to mismatches.

Keywords

CMOS memory circuits; SRAM chips; amplifiers; logic design; semiconductor diodes; CMOS technology; CSA; SRAM; W-L variations; bitline capacitance variations; clamped bitline SA; current latched sense amplifier; delay offset; gated diode SA; sense offset; size 65 nm; static random access memories; temperature variations; CMOS integrated circuits; CMOS technology; Delays; Indexes; Logic gates; Random access memory; clamped bitline; conventional; current latched; delay; gated diode; mismatches; offset; sense amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical, Computer and Communication Technologies (ICECCT), 2015 IEEE International Conference on

Print_ISBN

978-1-4799-6084-2

Type

conf

DOI

10.1109/ICECCT.2015.7226156

Filename

7226156