An integrated simulation framework for invasive computing

The trend of current and future domain-specific MPSoCs towards heterogeneous and tiled architectures as well as the increasing number of cores on a single chip impedes the design and the parallel programming of such computing systems. To tackle this problem a new computing paradigm called invasive computing has recently been proposed. Here, the workload and its distribution are not known at compile-time but are highly dynamic and can be adapted to the status (load, temperature, etc.) of the underlying architecture at run-time. The architectures envisaged for this resource-aware programming approach range from standard RISC core based platforms, tightly-coupled processor arrays for exploiting loop level parallelism to HPC systems. In order to explore such heterogeneous invasive architectures during early design phases, new means for modeling and simulating are required. Therefore, we present a novel and flexible simulation framework, which allows to model and simulate resource-aware applications on invasive architectures (including the associated system software) by integrating different architectural simulators in a modular way.