DocumentCode
3577845
Title
Voltage Designability: An enabler for selector technology
Author
Mandapati, R. ; Das, B. ; Ostwal, V. ; Ganguly, U.
Author_Institution
Dept. of Electr. Eng., India Inst. of Technol. Bombay, Mumbai, India
fYear
2014
Firstpage
1
Lastpage
4
Abstract
In this paper, first we evaluate array power performance using both Voltage Designable (VD) and Non-Voltage Designable (NVD) selection device (1S) technologies for (a) compatibility with range of memory (1M) operating voltages and currents and (b) selector variability. Firstly, cross-point (1S1M) on-off ratio degrades exponentially with NVD selectors for higher memory voltages while VD selectors provide immunity from such degradation by designing (increasing) the selector voltage. Consequently, array power increases exponentially for NVD selectors for higher memory voltages while it can be controlled effectively using VD selectors. Secondly, selector variability causes a necessary increase in cross-point voltage to ensure that majority (>99%) of the cross-points can be programmed. We show that selector variability also increases total array leakage (i.e Ioff). Designability of selector voltage available in VD selector enables the immunity from array power increase due to selector variability. Thus, VD selector is attractive due to its broad memory technology compatibility and selector variability immunity.
Keywords
integrated circuit design; random-access storage; NVD selection device technology; memory technology; nonvoltage designable; selector technology; selector voltage; voltage designability; Arrays; Conferences; Epitaxial growth; Integrated circuit modeling; Performance evaluation; Probability density function; Silicon; Cross-point element; Non-Volatile Memory; Selector Device; Selector Variability; Voltage Designability;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Memory Technology Symposium (NVMTS), 2014 14th Annual
Print_ISBN
978-1-4799-4203-9
Type
conf
DOI
10.1109/NVMTS.2014.7060863
Filename
7060863
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