Low rank matrix estimation using robust principal component analysis on FPGA

This paper presents a performance optimized FPGA based design for low rank matrix estimation using robust principal component analysis. The system is constructed using mesh connected processor array for singular value decomposition and specialized architectures for merge sort and matrix multiplication for re-composition of the matrix which is computed iteratively. There are no prior implementations of Robust PCA on FPGA and this work presents at least a 50 times performance increment upto 2048×2048 matrices, compared to a Matlab implementation running on Core i7-3610QM, 2.3 GHz processor with 8GB RAM.