Joint module selection and retiming with carry-save representation

Joint module selection and retiming is a powerful technique to optimize the implementation cost and the speed of a digital circuit. The use of carry-save signal representation is also a powerful technique in the high-speed implementation of arithmetic circuits. This work combines these two techniques to solve the joint module selection and retiming problem while allowing the use of carry-save representation. We formulate the problem as a mixed-integer linear programming (MILP) problem. Our algorithm, by allowing carry-save representation, can produce a wider range of solutions. In our experiments, our fastest implementation is 28% faster and our smallest implementation is 47% smaller, in comparison to solutions obtained using the previously known joint module selection and retiming technique.