Towards a Dynamic and Reconfigurable Multicore Heterogeneous System

Reconfigurable architectures are an alternative for classic superscalar organizations to the exploration of instruction level parallelism (ILP), while the multicore organizations are the most commonly used strategy to exploit thread level parallelism (TLP). This work extends a dynamic and transparent homogeneous multicore reconfigurable system (CReAMS) that explores both TLP and ILP, by making it heterogeneous, featuring cores with distinct resources. We will show that, for applications with low TLP, a heterogeneous configuration of CReAMS outperforms its homogeneous counterpart with the same chip area. The performed simulations prove the potential of using heterogeneous reconfigurable systems, showing speedups of up to 90%.