Broadband integration using FR-4 to silicon CPW-to-CPW transition

Author

Aroor, Supreetha Rao ; Pierce, Richard ; Blanchard, Andrew ; Henderson, Rashaunda

Author_Institution

Dept. of Electr. Eng., Univ. of Texas at Dallas, Richardson, TX, USA

fYear

2014

Firstpage

67

Lastpage

70

Abstract

This work demonstrates the use of gold stud bumps in the design of a CPW-to-CPW flip-chip transition between a silicon die and a FR-4 substrate. The performance is optimal in the 57 to 77 GHz range with return loss values better than 20 dB. The insertion loss of the designed transition and bump is 0.35 dB at 60 GHz as demonstrated in a back-to-back design. To demonstrate the usefulness of the transition, a back-to-back transition is integrated with a broadband aperture bowtie antenna fabricated onto the FR-4 substrate. The fractional bandwidth of the assembled IC and antenna using two stud bump transitions is better than 37% for a bump pitch of 400 μm.

Keywords

aperture antennas; bow-tie antennas; broadband antennas; coplanar waveguides; elemental semiconductors; flip-chip devices; gold; millimetre wave integrated circuits; silicon; Au; FR-4 substrate; Si; assembled antenna; assembled integrated circuit; back-to-back design; back-to-back transition; broadband aperture bowtie antenna; broadband integration; flip-chip transition; frequency 57 GHz to 77 GHz; gold stud bumps; silicon CPW-to-CPW transition; silicon die; Antennas; Coplanar waveguides; Gold; Integrated circuits; Loss measurement; Silicon; Substrates; CPW; aperture antenna; broadband; flip-chip; gold stud bumps;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2014 IEEE 23rd Conference on

Print_ISBN

978-1-4799-3641-0

Type

conf

DOI

10.1109/EPEPS.2014.7103596

Filename

7103596