Multicore MILS

Recent improvements in the performance and security architecture of modern microprocessor designs have made the implementation of the Multiple Independent Levels of Security (MILS) software architecture technically feasible and at affordable cost. Reaching this inflexion point has enabled the development of MILS systems on single-core processor architectures comprising applications and data of multiple security classifications hosted concurrently on the same platform. In this paper, the potential requirements for the implementation of a separation kernel to support MILS systems on multicore processor architectures will be considered, and the design challenges associated with its potential implementation on the Freescale QorIQ^TM P4080 multicore processor will be discussed. Finally, the potential use of a MILS Multicore separation kernel in two use cases will be presented - a Cross-Domain System (CDS) network gateway, and a Multi-Level Secure (MLS) Integrated Modular Avionics (IMA) platform.