DocumentCode
3596092
Title
Performance evaluation of Intel® Transactional Synchronization Extensions for high-performance computing
Author
Yoo, Richard M. ; Hughes, Christopher J. ; Lai, Koonchun ; Rajwar, Ravi
Author_Institution
Parallel Comput. Lab., Intel Labs., Santa Clara, CA, USA
fYear
2013
Firstpage
1
Lastpage
11
Abstract
Intel has recently introduced Intel® Transactional Synchronization Extensions (Intel® TSX) in the Intel 4th Generation Core™ Processors. With Intel TSX, a processor can dynamically determine whether threads need to serialize through lock-protected critical sections. In this paper, we evaluate the first hardware implementation of Intel TSX using a set of high-performance computing (HPC) workloads, and demonstrate that applying Intel TSX to these workloads can provide significant performance improvements. On a set of real-world HPC workloads, applying Intel TSX provides an average speedup of 1.41x. When applied to a parallel user-level TCP/IP stack, Intel TSX provides 1.31x average bandwidth improvement on network intensive applications. We also demonstrate the ease with which we were able to apply Intel TSX to the various workloads.
Keywords
microprocessor chips; parallel processing; performance evaluation; synchronisation; Intel 4th Generation Core Processors; Intel TSX; Intel transactional synchronization extension; high-performance computing; high-performance computing workloads; lock-protected critical sections; parallel user-level TCP/IP stack; performance evaluation; real-world HPC workloads; Benchmark testing; Hardware; Instruction sets; Libraries; Synchronization; High-Performance Computing; Transactional Memory;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing, Networking, Storage and Analysis (SC), 2013 International Conference for
Print_ISBN
978-1-4503-2378-9
Type
conf
DOI
10.1145/2503210.2503232
Filename
6877452
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