DocumentCode
3597140
Title
Register estimation for digital system design: an approach based on timed Petri nets
Author
Maciel, Paulo ; Barros, Edna ; Cavalcanti, Renata ; Barros, Tomaz
Author_Institution
Centro de Informatica, Univ. Fed. de Pernambuco, Recife, Brazil
Volume
4
fYear
2002
Abstract
This work presents a method based on Petri nets for estimating the number of registers needed for hardware implementation of behavioral descriptions. The proposed method considers the data-dependency graph represented by a Petri net model. Such a model along with the control flow, also represented by a Petri net model, describes behavioral specifications. This work is inserted in the context of hardware/software codesign systems.
Keywords
Petri nets; data flow graphs; formal specification; hardware-software codesign; behavioral descriptions; behavioral specification; control flow; data-dependency graph; data-flow representation; digital system design; formal specification; hardware software codesign; register estimation; timed Petri nets; Costs; Data analysis; Digital systems; Feedback; Hardware; Particle measurements; Petri nets; Phase estimation; Space exploration; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man and Cybernetics, 2002 IEEE International Conference on
ISSN
1062-922X
Print_ISBN
0-7803-7437-1
Type
conf
DOI
10.1109/ICSMC.2002.1173218
Filename
1173218
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