DocumentCode
3599469
Title
Hardware/software partitioning of software binaries: a case study of H.264 decode
Author
McGregor, Gordon ; Einloth, Brian ; Vahid, Frank ; Stitt, Greg
Author_Institution
Freescale Semiconductor
fYear
2005
Firstpage
285
Lastpage
290
Abstract
We describe results of a case study whose intent was to determine whether new techniques for hardware/software partitioning of an application´s binary are competitive with partitioning at the C source code level. While such competitiveness has been shown previously for standard benchmark suites involving smaller or unoptimized applications, the case study instead focuses on a complete 16,000-line highly-optimized commercial-grade application, namely an H.264 video decoder. The several month study revealed that binary partitioning was indeed competitive, achieving nearly identical 2.5x speedups as source level partitioning, compared to a standard microprocessor. Furthermore, the study revealed that several simple C-level coding modifications, including pass by value-return, function specialization, algorithmic specialization, hardware-targeted reimplementation, global array elimination, hoisting and sinking of error code, and conversion to explicit control flow, could lead to improved application speedups approaching 7x for both source level and binary level partitioning.
Keywords
Application software; Decoding; Embedded software; Embedded system; Field programmable gate arrays; Hardware; Kernel; Microprocessors; Partitioning algorithms; Software performance; FPGA; H.264; binaries; embedded systems; hardware/software partitioning; synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on
Print_ISBN
1-59593-161-9
Type
conf
DOI
10.1145/1084834.1084905
Filename
4076351
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