Modeling and experimental verification of substrate noise generation in a 220Kgates WLAN system-on-chip with multiple supplies

With increasing clock frequencies and resolution requirements in mixed-mode telecom circuits substrate noise is becoming more and more a major obstacle for single chip integration. At higher frequencies, the substrate noise is not scaling with the clock frequency anymore, especially when ringing occurs in the spectrum of the supply current transfer function to the substrate. In this paper, we propose a technique to estimate the substrate noise transients and its frequency spectrum on large telecom ASICs. The results have been verified with substrate noise measurements on a real-life test case: a 220Kgates telecom system-on-chip (SoC) implemented in a 0.35 µm CMOS process on an EPI-type substrate.