Vertical type double gate tunnelling FETs with thin tunnel barrier

A vertical type tunnelling field-effect transistor (TFET) with a thin tunnel junction based on a bulk Si substrate is presented. In the authors´ previously reported L-shaped TFET, a thin tunnel barrier and a large tunnelling area were employed on the source side to achieve a steep subthreshold swing (SS) and high on-current, which can lead to the TFET´s outstanding performance. The proposed TFET devices demonstrate a SS of 32 mV/decade averaged over five decades and an I_on > 10^-5 A/μm. Moreover, the on-current can be increased easily by adjusting the height of the source. However, since a hump phenomenon in the transfer curves occurred, the hump behaviour in the proposed device was investigated. After investigating it, the hump behaviour was found to have originated from two different tunnelling regions. Moreover, their threshold voltages show different values. Using a capping layer that can be made by gradual doping, the hump behaviour can be suppressed.