DocumentCode
3603188
Title
Multicast FullHD H.264 Intra Video Encoder Architecture
Author
Khan, Muhammad Usman Karim ; Shafique, Muhammad ; Bauer, Lars ; Henkel, Jorg
Author_Institution
Dept. of Embedded Syst., Karlsruhe Inst. of Technol., Karlsruhe, Germany
Volume
34
Issue
12
fYear
2015
Firstpage
2049
Lastpage
2053
Abstract
High throughput demands have resulted in enormous increase in complexity of multicast video applications, which require multiple video encoders to simultaneously compress individual views. In this paper, we present an approach to encode independent videos using H.264 intra encoder on a single hardware platform, where the hardware resources are shared by independent encoders in a time-multiplexed manner. In addition to lowering the latency introduced by multicasting, we address the strong sequential data dependencies within the encoder. At 25 frames/s, 150 MHz prototype of the proposed encoder and multiple video capture/display on a mid-range field programmable gate array is also presented.
Keywords
field programmable gate arrays; high definition video; multicast communication; time division multiplexing; video coding; H.264 intravideo encoder architecture; field programmable gate array; hardware platform; independent encoder; multicast full HD video; sequential data dependency; time-multiplexed manner; video capture; video display; Discrete cosine transforms; Encoding; Field programmable gate arrays; Hardware; Logic gates; Quantization (signal); FPGA implementation; Field programmable gate array (FPGA) implementation; FullHD video encoder; H.264 encoder; Multicast; hardware sharing; multicast;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2015.2446933
Filename
7128360
Link To Document