GIDL Characteristics in Gated-Diode Memory String and Its Application to Current-Steering Digital-to-Analog Conversion

This paper investigates gate-induced drain leakage (GIDL) characteristics in a cell string consisting of gated-diode memory cells. Gated-diode cells have an oxide/ nitride/oxide gate dielectric stack to implement a nonvolatile memory and are formed in a cell string with a select MOSFET located at one end. Gated diodes in a string are investigated with regard to memory performance. The string current is the sum of individual GIDL currents from the cells. It can be accurately controlled by programming or erasing the cells. Using a 1×6 cell string, a 6-b binary-weighted current-steering digital-to-analog converter (DAC) is demonstrated experimentally. By programming the cells to have binary-weighted cell currents by means of an incremental step pulse programming, the effective number of bits becomes 5.98 b in the DAC. As a means of increasing the GIDL current, a thin SiGe epilayer is adopted, with a simulated current improvement of more than 10³ times at a gate voltage of -3 V.