Accurate Delay Extraction of Serpentine Lines for Next-Generation High-Density DRAMs

As trace dimension reduces to 2 mil or smaller in next-generation high-density DRAMs, length matching design using serpentine lines could result in timing error larger than 50%. Significant coupling in parallel segments of serpentine lines could greatly affect the propagated speed of digital signals. In this paper, accurate delay extraction for serpentine lines is proposed. Formulas for accurate delay extraction are presented, and guidelines for minimized crosstalk are developed. Two main contributions of this paper are: 1) delay of serpentine lines is first accurately extracted by mathematical formulas and 2) an interesting undistorted transmission mode of serpentine lines is first analyzed. Electromagnetic simulated results show that our method yields accurate delay with error smaller than 10%, while traditional delay estimation could introduce error larger than 130%.