DocumentCode
3612594
Title
Generalised switching scheme for a space vector pulse-width modulation-based N -level inverter with reduced switching frequency and harmonics
Author
Jana, Kartick Chandra ; Biswas, Sujit K.
Author_Institution
Electr. Eng., Indian Sch. of Mines, Dhanbad, India
Volume
8
Issue
12
fYear
2015
Firstpage
2377
Lastpage
2385
Abstract
This study presents a generalised online switching scheme for a space vector pulse-width modulation (SVPWM)-based multilevel inverter of any voltage level. The proposed SVPWM algorithm implements a generalised three-(similar to five) and seven-segment switching scheme using the three most desired switching states and one suitable redundant state for each triangle. In addition, a novel three-segment and seven-segment switching scheme has been proposed, which eliminates extra switching commutations and hence minimises the switching frequency of the devices while reducing harmonics. The proposed modulation algorithm using the generalised expressions is implemented online. The performance of the proposed novel algorithm for N-level inverter is tested experimentally on a five-level cascaded inverter at various fundamental frequencies and the experimental results are verified with the simulation results.
Keywords
PWM invertors; SVPWM-based multilevel inverter; five-level cascaded inverter; generalised online switching scheme; generalised three-switching scheme; harmonics reduction; reduced switching frequency; seven-segment switching scheme; space vector pulse-width modulation-based N-level inverter; voltage level;
fLanguage
English
Journal_Title
Power Electronics, IET
Publisher
iet
ISSN
1755-4535
Type
jour
DOI
10.1049/iet-pel.2015.0101
Filename
7364325
Link To Document