• DocumentCode
    3613637
  • Title

    Bit-matrix decomposition and dynamic reconfiguration: a unified arithmetic processor architecture, d

  • Author

    Rong Lin

  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Keywords
    "Testing","Computer architecture","Digital arithmetic","Graphics","Rendering (computer graphics)","Circuit simulation","Delay","Very large scale integration","Concurrent computing","Matrix decomposition"
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM
  • Print_ISBN
    0-7695-1573-8
  • Type

    conf

  • DOI
    10.1109/IPDPS.2002.1016548
  • Filename
    1016548
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3613637