DocumentCode
3614181
Title
Capacitive synapses for microelectronic neural networks
Author
U. Cilingiroglu
Author_Institution
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear
1990
fDate
6/12/1905 12:00:00 AM
Firstpage
2982
Abstract
It is shown that the synaptic function of nonadaptive neural networks can be implemented with a single capacitor. The resulting synaptic matrix, being devoid of active devices, offers not only very high space efficiency, but also negligible DC power, perfectly linear dendritic functionality, negligible process noise, and simple and fast sensing. The generic capacitor matrix is analyzed on the bases of dendritic charge conservation, and the results are used to design a double-poly CMOS feedforward classifier which is capable of correcting any 3-bit error occurring in a set of 30 16-bit code-patterns. Each synapse occupies a 16.5 mu m*10 mu m field-oxide space for the very conservative 3 mu m rules used in this particular design. Electrical performance is verified through simulation.
Keywords
"Microelectronics","Neural networks","Capacitors","Space technology","Capacitance","Circuits","Clocks","Timing","Active noise reduction","Fabrication"
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Type
conf
DOI
10.1109/ISCAS.1990.112637
Filename
112637
Link To Document