DocumentCode
3614522
Title
Video compression hardware implementation using programmable media processor
Author
T. Kratochvil;T. Fryza
Author_Institution
Inst. of Radio Electron., Brno Univ. of Technol., Czech Republic
Volume
1
fYear
2003
fDate
6/25/1905 12:00:00 AM
Firstpage
299
Abstract
The contribution deals with the real time hardware implementation of the video compression algorithms. The real time media TM-1300 IREF PCI bus board used for research and education in Laboratory of television technique and video technique FEEC BUT is introduced. The different standards used for coding audio-visual information in a digital compressed format are presented in this paper too. Besides the MPEG family standards and the wavelet-based compression, the 3D-DCT transform is outline as well.
Keywords
"Video compression","Hardware","Videoconference","Transform coding","Laboratories","Streaming media","Image coding","Coprocessors","Application software","TV"
Publisher
ieee
Conference_Titel
Video/Image Processing and Multimedia Communications, 2003. 4th EURASIP Conference focused on
Print_ISBN
953-184-054-7
Type
conf
DOI
10.1109/VIPMC.2003.1220478
Filename
1220478
Link To Document