DocumentCode
3615223
Title
Invar-a new approach to EDA benchmark generation
Author
M. Kunes;M. Danek
Author_Institution
Dept. of Comput. Sci. & Eng., Czech Tech. Univ., Prague, Czech Republic
fYear
2003
fDate
6/25/1905 12:00:00 AM
Firstpage
50
Lastpage
53
Abstract
This article introduces a new method for generating benchmark circuits. Common methods of testing physical design algorithms and functional verifications used today rely on standardised sets of widely accepted benchmark circuits, or on generating a random benchmark circuit based on its desired characteristics. Although these approaches are suitable in many situations, sometimes it is advantageous to know an exact function of a benchmark circuit. This article introduces a new method for generating benchmarks that is based on structural modifications of a user-specified design without altering its function. The method uses a set of pre-defined operations on a circuit netlist. The method is demonstrated on several examples.
Keywords
"Electronic design automation and methodology","Benchmark testing","Circuit testing","Algorithm design and analysis","Computer science","Character generation","Field programmable gate arrays","Documentation","Runtime","Logic circuits"
Publisher
ieee
Conference_Titel
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN
977-05-2010-1
Type
conf
DOI
10.1109/ICM.2003.238304
Filename
1287720
Link To Document