Effectiveness of fault detection for low-overhead self-testing VLSI circuits

Efficient procedures for estimating fault detection capabilities of self-testing circuits designed using the circular self-test path technique are presented. Based on the concept of the expected-state coverage, the probability of exhaustive testing and a lower bound on the worst-fault detection probability are derived. These fault detectability estimates can be helpful when designing self-testing circuits, as illustrated by an alternative built-in-self-test scheme for the 80386 microprocessor.