• DocumentCode
    3621053
  • Title

    Implementation of a DAB receiver with FPGA technology

  • Author

    R. Cabral;S. Escarigo;H. Neto;H. Sarmento

  • Author_Institution
    IST, Portugal
  • fYear
    2006
  • fDate
    6/28/1905 12:00:00 AM
  • Firstpage
    397
  • Lastpage
    398
  • Abstract
    This paper describes the implementation of the main digital blocks of a DAB receiver. Hardware design is coded using HDL languages. Implementation is realized in a Virtex2 device. The integration of digital blocks, in order to implement a complete receiver, is analyzed
  • Keywords
    "Field programmable gate arrays","Decoding","Demodulation","OFDM","Radio frequency","Telecommunication standards","Viterbi algorithm","Digital audio broadcasting","Hardware design languages","Receivers"
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, 2006. ICCE ´06. 2006 Digest of Technical Papers. International Conference on
  • Print_ISBN
    0-7803-9459-3
  • Type

    conf

  • DOI
    10.1109/ICCE.2006.1598478
  • Filename
    1598478
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3621053