Stochastic modeling and analysis of propagation delays in processing units

Aging and harsh environmental conditions can make logic gates to change their internal delays, which has an impact on the time-domain characteristics of functional units in a typical processor. The propagation delay (after the effect of aging and/or exposure to harsh environmental conditions) of the functional unit is not known ahead of time. However, the probability distribution function (PDF) of the propagation delay (of a single gate) is typically known. Hence, the impact of the change in the time-domain characteristic of functional unit can be studied with PDF of the propagation delay in the processor logic. A stochastic model and some mathematical tools have been developed in the past, to help in determining the PDF of an arbitrary gate network. The authors present the application of the stochastic model and mathematical tools to a simple RISC type CPU data path.