Intrusion Detection System Intended for Multigigabit Networks

Network intrusion detection systems (IDS) are becoming an important tool for securing critical information and infrastructure. Current software-based IDS often fails to keep up with high-speed network links so a hardware based IDS is requested. This paper deals with design and implementation of complete hardware accelerated IDS solution based on field-programmable gate array (FPGA). Core generator for automatic mapping of IDS rules to FPGA logic was designed to assure fast packet classification and high speed pattern matching. Proposed architecture has been evaluated on a COMB06X card with FPGA Virtex-II Pro. Using COMB06X card theoretical throughput 6.4 Gbps was achieved for all Snort rules. The designed system can be configured by rules described in Snort format using web interface.