Developing Virtual ADC Testing Environment in MAPLE

This paper proposes an innovative concept of a virtual testing environment for analog-to-digital converters (ADCs) applying a suitable conjunction of two performance extraction algorithms -the Servo-Loop and Histogram method. The testing engine proposed is implemented in MAPLE and consists of program procedures to extract ADC errors expressed in term of integral and differential non-linearity (INL and DNL). The novelty of our solution is the use of effective search algorithm and improved convergence properties resulting in a significant reduction of the simulation time. Another advantage of the proposed approach is the fact that the implementation in MAPLE creates an ideal opportunity to build a complex environment comprising the virtual testing engine as well as circuit-level ADC models. Simulation results are shown, demonstrating the output of the ADC testing procedures using both the Servo-Loop and Histogram method.