From Transistor to PLL - Analogue Design and EDA Methods

Summary form only given, as follows. Although analogue and mixed-signal design is greatly complicated by numerous design choices, the management of these design choices presents significant opportunities for optimising designs for desired tradeoffs in performance and high production yield. This tutorial describes analog design and EDA methods beginning with MOS transistors and concluding with PLLs as complete mixed-signal systems. Tutorial topics include: (1) tradeoffs and optimisation in analogue CMOS design through transistor drain current, inversion coefficient, and channel length selections; (2) transistor sizing rules, rules for transistor groups, and robust Pareto optimisation of circuits; (3) analogue synthesis, hierarchical design, and yield optimisation; and (4) behavioral modelling of oscillators and PLLs using nonlinear phase macro models that capture jitter and phase noise, injection locking, PLL lock and capture phenomena, and cycle slipping. Tutorial topics are interrelated with each other and illustrated using actual designs. Finally, future directions for analogue design and EDA are suggested, including applications to biological systems such as mammalian circadian rhythms. This tutorial is targeted to analogue and mixed-signal designers, EDA developers and users, design managers, and advanced university students.