• DocumentCode
    3629839
  • Title

    Lowering LDPC Error Floors by Postprocessing

  • Author

    Zhengya Zhang;Lara Dolecek;Borivoje Nikolic;Venkat Anantharam;Martin J. Wainwright

  • Author_Institution
    Dept. of EECS, Univ. of California, Berkeley, CA
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    A class of combinatorial structures, called absorbing sets, strongly influences the performance of low-density parity-check (LDPC) decoders at low error rates. Past experiments have shown that a class of (8,8) absorbing sets determines the error floor performance of the (2048,1723) Reed-Solomon based LDPC code (RS-LDPC). A postprocessing approach is formulated to exploit the structure of the absorbing set by biasing the reliabilities of selected messages in a message-passing decoder. The approach converges quickly and can be efficiently implemented with minimal overhead. Hardware emulation of the decoder with postprocessing shows more than two orders of magnitude improvement in the very low bit error rate performance and error- floor-free operation below a BER of 10-12.
  • Keywords
    "Parity check codes","Iterative decoding","Bit error rate","Floors","Emulation","Error analysis","AWGN","Reed-Solomon codes","Hardware","Iterative algorithms"
  • Publisher
    ieee
  • Conference_Titel
    Global Telecommunications Conference, 2008. IEEE GLOBECOM 2008. IEEE
  • ISSN
    1930-529X
  • Print_ISBN
    978-1-4244-2324-8
  • Type

    conf

  • DOI
    10.1109/GLOCOM.2008.ECP.590
  • Filename
    4698365