• DocumentCode
    3635163
  • Title

    One junction approach to make deep submicron PMOSFETs for low power applications

  • Author

    S. Kubicek;S. Biesemans;K. De Meyer

  • Author_Institution
    IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
  • fYear
    1996
  • Firstpage
    523
  • Lastpage
    526
  • Abstract
    In this paper we report about theoretical and experimental investigation of the the possibility to fabricate deep submicron PMOS transistors for low power CMOS applications by using only one (HDD) junction without LDD or extensions as it is standardly done.
  • Keywords
    "MOSFETs","Doping profiles","Boron","Immune system","Hot carriers","Voltage","Hot carrier effects","Degradation","Boundary conditions","Region 3"
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1996. ESSDERC ´96. Proceedings of the 26th European
  • Print_ISBN
    286332196X
  • Type

    conf

  • Filename
    5436174
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3635163