• DocumentCode
    3637442
  • Title

    Efficient multi-VT FDSOI technology with UTBOX for low power circuit design

  • Author

    C. Fenouillet-Beranger;O. Thomas;P. Perreau;J-P. Noel;A. Bajolet;S. Haendler;L. Tosti;S. Barnola;R. Beneyton;C. Perrot;C. de Buttet;F. Abbate;F. Baron;B. Pernet;Y. Campidelli;L. Pinzelli;P. Gouraud;M. Cassé;C. Borowiak;O. Weber;F. Andrieu;K.K. Bour

  • Author_Institution
    CEA-LETI MINATEC, 17 rue des Martyrs, 38054 Grenoble, France
  • fYear
    2010
  • Firstpage
    65
  • Lastpage
    66
  • Abstract
    For the first time, Multi-VT UTBOX-FDSOI technology for low power applications is demonstrated. We highlight the effectiveness of back biasing for short devices in order to achieve ION current improvement by 45% for LVT options at an IOFF current of 23nA/µm and a leakage reduction by 2 decades for the HVT one. In addition, fully functional 0.299um2 bitcells with 290mV SNM at 1.1V and Vb=0V operation were obtained. We also demonstrate on ring oscillators and 0.299µm2 SRAM bitcells the effectiveness (ΔVT versus Vb ∼ 208mV/V) of the conventional bulk reverse and forward back biasing approaches to manage the circuit static power and the dynamic performances.
  • Keywords
    "MOS devices","Logic gates","Random access memory","Substrates","Metals","Silicon","Ring oscillators"
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSIT), 2010 Symposium on
  • Print_ISBN
    978-1-4244-5451-8
  • Type

    conf

  • DOI
    10.1109/VLSIT.2010.5556118
  • Filename
    5556118