DocumentCode
3639405
Title
Cellular neural network based VLSI architecture for image processing
Author
K. Slot;J. Kowalski;J. Pacholik;P. Debiec
Author_Institution
Inst. of Electron., Tech. Univ. Lodz, Poland
fYear
1996
Firstpage
249
Lastpage
254
Abstract
The paper presents a way for increasing a size of images which can be processed using cellular neural networks based VLSI circuits. The basic idea is to reduce a number of rows which are being simultaneously processed in a network. To verify the proposed idea, a VLSI integrated circuit which allows for realizing selected gray-level image analyses, has been designed, manufactured and its performance was examined. In addition, a possibility of applying the proposed concept in realizing image processing operations where global signal propagation is crucial, such as halftoning, has been discussed.
Keywords
"Cellular neural networks","Very large scale integration","Image processing","Signal processing","Computer architecture","Electronic mail","Image analysis","Integrated circuit manufacture","Parallel architectures","Manufacturing processes"
Publisher
ieee
Conference_Titel
Cellular Neural Networks and their Applications, 1996. CNNA-96. Proceedings., 1996 Fourth IEEE International Workshop on
Print_ISBN
0-7803-3261-X
Type
conf
DOI
10.1109/CNNA.1996.566569
Filename
566569
Link To Document