Design for reliablity: A novel counter matrix code for FPGA based quality applications

The scaling down of semiconductor technology in FPGA increases the soft errors due to radiation effects in space. To address this technological challenge a novel coding technique, Counter Matrix Code (CMC) is proposed to protect the SRAM based FPGA´s configuration memories (FCM) against radiation induced Multiple Bit Upsets (MBU) with Low cost and maximum correction capability. The proposed CMC is experimentally studied for its efficiency and reliability. The proposed technique improves the reliability of the memory by more than 7× compared to traditional HC technique and more than 4× compared to MC and more than 2× compared to DMC. The cost of the proposed work is less than traditional DMC and MC.