A 40Gb/s adaptive equalizer with amplitude approaching technique in 65nm CMOS

An adaptive equalizer which operates at 40Gb/s using amplitude approaching technique is introduced in this paper. The proposed equalizer has a simple architecture to compensate the channel adaptively. The common mode detection of the equalizer filter output with the resister ladder that can generate the reference voltages depending on the common level of the output of the filter is presented as well. The simulation results show that the equalizer could compensate for 20dB channel loss at 20GHz. The jitter of equalized data is 2.8ps and the total power consumption is 40mW under the IV supply voltage.