Hardware implementation on m parameter ML estimation of Nakagami-m fading channel

A wideband field-programmable gate array (FPGA) based hardware implementation for the m parameter estimation of the Nakagami-m fading channel is introduced. It requires fresh estimation of the noise spectrum power density to actually evaluate the signal-to-noise ratio (SNR), and with it, one can efficiently measure the m parameter of Nakagami-m fading channel. The hardware employs a Xilinx Virtex-6 SX475T-2c FPGA integrated Minibee platform operated in Centos system, in which a wideband quadrature modulator ADL5375 is integrated, with output frequency ranging from 400MHz to 6GHz. Such a hardware framework enables the measure system to function well in wireless wideband systems. In addition, we utilize it to conduct real-scenario estimations and compare the results with the software simulations. It also indicates our developed m parameter ML estimation has a better performance compared with some known estimation algorithms.