Implementation of 2D torus automorphisms for image encryption on FPGA

The convenience of torus automorphism is widely used in network security, data encryption, image watermarking and pattern recognition. This paper presents an implementation and synthesis of FPGA based multimedia image encryption technique by 2D torus automorphism. The proposed computational algorithm of 2D torus automorphism is simple as only three addition and two multiplication logic operations is used for generating the positions of next incident matrices. Therefore this simple system of equation of torus automorphism can be implemented on field programmable gate array (FPGA). The designs were realized in Verilog HDL and synthesized on Vertex-5 FPGA. The encrypted implementations were completely parameterized with respect to the input image dimension and the recurrence number which is dependent on the value of torus coefficient. All exhaustive obtained results regarding the logic block uses, memory requirements and timing report associated with the proposed architecture are investigated. The results consummate the veracity of 2D torus automorphism. This applied work can be useful for real time image encryption applications.