Evaluation of PWM methods for suppressing circulating current among parallel connected four-pole inverters

Parallel-connected four-pole inverters (FPIs) becomes an important application in three-phase four-wire uninterrupted power system, owing to the benefits like high reliability, cost-effective and the convenient expansion of power capacity. Nevertheless, such parallel connection would lead to the side-effects, just as the circulating current, accompanied by extra loss and current distortion. The difference of common mode voltages (CMV) significantly causes the circulating current, and associated with the switching states and injected offset of scalar PWM. Therefore, this paper respectively investigate the conventional three-dimension pulse width modulation (3-D PWM) and the recently developed 3-D reduced-CMV PWM (3-D RCMVPWM), and evaluate the performance on mitigating circulating current. The overall researches are established on a two-module parallel connected system, and the mathematical model is made to discuss the phenomenon of circulating current. Besides, the experiment results are supported to validate the analysis and evaluation of 3-D PWM in various conditions.