Intrinsic evolution of digital circuits based on a reconfigurable hyper-structure

This work presents an intrinsic implementation of Evolvable Hardware, for evolving optimal digital combinatorial circuits. The evolutionary optimization is performed by an enhanced Genetic Algorithm that works on binary encodings of solutions. Potential circuits are built and evaluated on a reconfigurable Cartesian hyper-structure that is pre-configured on an FPGA circuit, together with communication and control logic. Test results are provided for a number of well-known digital circuits. The results are promising, and show the effectiveness of the proposed implementation.