DocumentCode
3682811
Title
JAIP-MP: A four-core Java application processor
Author
Chun-Jen Tsai;Tsung-Han Wu;Hung-Cheng Su
Author_Institution
Dept. of Computer Science, National Chiao Tung University, Hsinchu City, Taiwan 300
fYear
2015
Firstpage
189
Lastpage
194
Abstract
In this paper, we present the design of a four-core Java application processor, JAIP-MP. Each processor core in JAIP-MP is a hardwired Java core that supports dynamic class loading, two-fold bytecode execution, object-oriented dynamic resolution, method and object caching, Java exception handling, and temporal multithreading. For JAIP-MP, a global load-balancing task manager is used to evenly distribute Java threads among the local task queues of every processor cores. In addition, a data coherence controller is designed to enforce coherence across all data caches and to perform synchronization operations among Java threads of all processor cores. Since thread management and synchronization mechanisms are completely implemented in hardware, the single-core multi-tasking performance of JAIP-MP is much higher than that of a software-based VM running on a traditional OS kernel such as Linux. For execution of multithreading applications, the speedup of a four-core JAIP-MP system can be up to 3.69 times faster than a single-core JAIP system, tested using the JemBench parallel benchmark programs.
Keywords
"Java","Engines","Instruction sets","Switches","Synchronization","IP networks"
Publisher
ieee
Conference_Titel
Very Large Scale Integration (VLSI-SoC), 2015 IFIP/IEEE International Conference on
Electronic_ISBN
2324-8440
Type
conf
DOI
10.1109/VLSI-SoC.2015.7314414
Filename
7314414
Link To Document