DocumentCode
3689005
Title
Scalability of planar FDSOI and FinFETs and What´s in store for the future beyond that?
Author
Bruce B. Doris;Terence Hook
Author_Institution
IBM Research T. J. Watson Research Center, Yorktown Heights, NY 10598
fYear
2015
Firstpage
160
Lastpage
163
Abstract
Conventional planar transistors have been used throughout the semiconductor industry for the past several decades. Further miniaturization of conventional devices has been proven to be a significant challenge and thus the industry has transitioned to Planar Fully Depleted FETs and FinFETs. As we look out at technologies beyond 7nm node there are many barriers which appear to limit the scalability of FinFETs. Therefore it is important to consider the device architecture options that can serve as a replacement and enable further scaling to meet future technology requirements. This invited talk discusses the scalability of Fully Depleted FETs and FinFETs and also proposes options to enable continued scaling beyond 7nm node.
Keywords
"Logic gates","Electrostatics","Performance evaluation","Silicon","Wires","Strain","Transistors"
Publisher
ieee
Conference_Titel
Solid State Device Research Conference (ESSDERC), 2015 45th European
ISSN
1930-8876
Print_ISBN
978-1-4673-7133-9
Electronic_ISBN
2378-6558
Type
conf
DOI
10.1109/ESSDERC.2015.7324738
Filename
7324738
Link To Document