DocumentCode
3698649
Title
On-chip hardware accelerators for data processing and combinatorial search
Author
Valery Sklyarov;Iouliia Skliarova
Author_Institution
University of Aveiro, Department of Electronics, Telecommunications and Informatics/IEETA, Portugal
fYear
2015
Firstpage
52
Lastpage
56
Abstract
Data processing and combinatorial search are widely used techniques in the scope of information and communication. Examples of practical applications are sorting, frequent items encountering, matrix/set covering, graph/map coloring, data mining, priority management, and many others. Often information/data processing that involves the listed above tasks has to be done in embedded systems where high performance needs to be achieved in portable and low-cost devices integrating multiple functions and capabilities. An efficient development technique for such systems is hardware/software co-design with the use of programmable systems-on-chip that are highly integrated, easily customizable/configurable and permit broad parallelism to be supported that is the primary way to accelerate computations. The tutorial is dedicated to such a design technique.
Keywords
"Sorting","Registers","Hardware","Software","System-on-chip","Data mining","Parallel processing"
Publisher
ieee
Conference_Titel
Application of Information and Communication Technologies (AICT), 2015 9th International Conference on
Print_ISBN
978-1-4673-6855-1
Type
conf
DOI
10.1109/ICAICT.2015.7338515
Filename
7338515
Link To Document