Stepped parity: A low-cost multiple bit upset detection technique

Radiation-induced Multiple Bit Upsets (MBUs) are major reliability concerns for embedded memory arrays fabricated in advanced technology nodes. Although various error correction techniques with different attributes have been developed, there has been limited efforts towards pure MBU detection. In this paper, we present stepped parity, a cost-efficient technique to detect MBUs in memory arrays. In this technique, each data bit is associated with several parity bits in a way that the most common MBU patterns could be detected by at least one of the parity bits. The experimental results reveal that the stepped parity reduces the area and power overheads of the stat-of-the-art solutions by about 30% for a given reliability constraint.