How many probes is enough? A low cost method for probe card depopulation with low risk

The number of bumps that are touched during probe is a key factor in the cost of a probe card. DFT techniques have been commonly used to reduce the number of signal bumps that need to be probed, but the vast majority of bumps in a typical SoC are allocated to core power and ground. In this paper we describe a technique using power supply noise simulations to develop special bump masks that reduce multi-site probe card costs by eliminating a significant percentage of power and ground bumps. With these new techniques we have shown savings of between $30K and $50K per production probe card while maintaining overall speed on critical paths and without a noticeable reduction in yield.